Speed record for EM simulation with FDTD: 21000 MCells/s

Nov 2016
A new speed record for EM simultion with FDTD has been obtained with EMPIRE XPU 7.51

A new speed record has been obtained with EMPIRE XPU. On a quad Intel Xeon server a simulation performance of up to 21000 MCells/s could be achieved using the current version 7.51.

With its Just In Time (JIT) structure and processor adapted code generation EMPIRE XPU fully exploits the processor architecture by using the second and third level cache for multiple time stepping and parallelization on all built-in cores.

In contrast to solutions which make use of graphic card accelerators the performance obtained with EMPIRE XPU allows the usage of the complete built-in memory. A high speed is achieved for all models sizes from 1 million FDTD up to more then 6500 Million FDTD cells.

The graph below shows the performance figures versus structure size compared to an up-to-date GPU solution:

Simulation speed using EMPIRE XPU vs. GPU FDTD